||The recent advancements in neuroprosthetics have pushed forward the development of new implantable electronic interfaces between the Peripheral Neural System (PNS) and a robotic limb . One of the main advantages of the neuroprostheses is the possibility to restore the sensory feedback to the patient. This is possible thanks tocustom designed devices able to transduce the external information, picked up by sensors collocated on the robotic limb, into electrical currents to be injected through the nerve . In this paper, a neural stimulator able to deliver bi-phasic current pulses to eight different channels is presented. An Integrated Circuit (IC), implemented in a HV 0.35µm technology from AMS has been realized and successfully tested. The impedance at the electrode-tissue interface is highly variable and degrades with time, therefore a high voltage supply is needed to guarantee the selected stimulation current even in case of high impedance contact . For this reason, a voltage booster has been introduced in the design to provide a highvoltage supply to the stimulator output stage. Fig. 1 represents the block diagram of our system: the stimulation currents are generated by 6-bit current DACs implemented in a low voltage domain tosave power and area. The current is then mirrored into a high voltage output stage, powered by the voltage generated by the booster. Finally, the current is injected into the patient nerve by means of intrafascicular electrodes . The current must be generated avoiding charge accumulation at the tissue interface, in fact, this can cause severe damages to the cells. Bi-phasic waveforms prevent this risk balancing the current injected in the first phase with a second opposite phase. A third phase, in which the electrode terminals are shorted together, has been added to eliminate any residual charge. The circuit used to realize this pattern and the pulse diagram are shown, respectively, in Fig. 2 and Fig. 3. The current can be programmed via-PC by the user in terms of amplitude, pulse width and period as indicated in Table 1. The experimental setup used to test the stimulator (Fig.4) is made up of a custom PCB, that hosts the IC, and a Xilinx FPGA Spartan-6 LX45, used to configure the IC and to manage the communication with the PC. The chip occupies an area of 17.68 mm 2 (the layout is represented in Fig.5) and consumes 29mW in high power mode. First, the capability of the voltage booster to generate programmable voltages has been tested. Fig. 6 shows as a supply voltage up to 15.8V can be generated by the booster. The current programmability is shown in Fig.7, where, using a 10kΩ resistance to emulate the electrode impedance, a biphasic pulse with different amplitudes has been obtained. With this impedance, currents up to 326µAcan be reached. Fig. 8, shows a pulse train acquired choosing a pulse width of 150µs and a frequency of 400 Hz. All the results confirm the system capability to properly deliver the programmed stimulation currents.