IN/0157/E - COMPUTER ARCHITECTURES/E
Academic Year 2018/2019
Free text for the University
FABIO ROLI (Tit.)
- Teaching style
- Lingua Insegnamento
|[70/89] ELECTRICAL, ELECTRONIC AND COMPUTER ENGINEERING||[89/46 - Ord. 2016] ELETTRICA ON LINE E IN PRESENZA (BLENDED)||6||36|
|[70/89] ELECTRICAL, ELECTRONIC AND COMPUTER ENGINEERING||[89/56 - Ord. 2016] ELETTRONICA ON LINE E IN PRESENZA (BLENDED)||6||36|
|[70/89] ELECTRICAL, ELECTRONIC AND COMPUTER ENGINEERING||[89/66 - Ord. 2016] INFORMATICA ON LINE E IN PRESENZA (BLENDED)||6||36|
Knowledge and understanding: the student will know the main concepts on modern computer architectures and will understand the basic operation. Know the basic concepts of assembly language (MIPS language).
Ability to apply knowledge and understanding: the student will be able to solve elementary exercises on digital logic circuits and the main components of the architecture of a modern computer. Will be able to analyze and understand the operation of simple ldigital logic circuits and the main components of the architecture of a computer. Will be able to read and write simple programs in MIPS assembly language.
Making judgments: given a design problem of simple digital logic circuits or a a design problem of main components of the architecture of a modern computer, the student will be able to identify the most practical solution. Will be able to check the correctness of simple programs in the MIPS assembly language.
Communication skills: the student will have a command of the basic terminology on computer architectures.
Ability to learn independently, the student will be able to independently deepen the knowledge about the architecture of a modern computer and machine languages used.
Skills required for admission to the course of studies without debits. This is a first year course taught in an integrated way with the course of Elements of Computer Science.
Basic knowledge on computers. Architecture and organization. Structure and Function. Structure of a computer. Brief history of computers. Performance measurement. (1.5 hours)
Operation of the Von Neumann machine: main memory, bus, CPU, input / output. Running Programs (2 hours)
Fundamentals of Logic Design. Boolean Algebra. Definition and basic elements. Logic gates. Boolean functions. Combinatorial networks. Analysis and synthesis of combinatorial networks. Examples of combinatorial networks. Synchronous sequential. Memory elements and synchronization. Analysis and synthesis of synchronous sequential circuits. Examples of synchronous sequential circuits. (12 hours, 6 hours exercises)
The memory unit of a computer. General concepts. Features of a memory system. Memory hierarchy. Internal memories. Cache memory. External memories. Error-correcting codes (Hamming). (13 hours, 6 of which exercise)
The central processing unit: machine instructions. The main elements of a statement by car. Cycle instruction execution. Instruction format. Classes of instructions. Operands. Addressing the operands. The "pipeline". Timing of the pipeline. Speed-up. (5 hours, 2 exercises)
The assembly language. Introduction to Assembly language: The MIPS. The basic operations: add, sub. Storage instructions: lw, sw. Conditional and Unconditional Jumps: beq, bne, j. Jumps to a subroutine: jal, jr. Saving and restoring the context technique "callee save" and "caller save". (13.5, 7 hours exercises)
Central processing unit: mean of computers. The arithmetic-logic unit (ALU). Representation of integers. Integer arithmetic. Floating point representation. Floating-point arithmetic. Hardware of the ALU. (6 hours, 3 hour exercises)
Unit Input Output. General concepts. Devices. Module I / O. I / O program. I / O interruption. Direct Memory Access (DMA). Processor I / O. Interfacing. (7 hours, 3 hours exercises).
The course is organized as follows:
Lectures with numerical examples: 28 hours
Exercises: 8 hours
Tutoring: on average 30 hours during the course.
Verification of learning
The final test is designed to assess the achievement of learning outcomes by means of a written test consisting of 4 or 5 problems, with scores varying from 4 to 12/30, each problem is related to one of the objectives of learning outcomes.
The written test is mandatory and is sustainable during regular exam sessions or by means of two mid-term tests during the semester.
The oral exam is optional if the written test score is greater than or equal to 21/30. Final grade = 70% written exam, oral exam 30%.
Stallings W., “Architettura e organizzazione dei Calcolatori – Sesta edizione”, Pearson-Addison Wesley, 2004 (ISBN: 8871922018)
Patterson A.D., Hennessy J., “Struttura, organizzazione e progetto dei calcolatori elettronici”, Jackson Libri, Collana Università, 2000 (ISBN: 8825615175)
Tanenbaum A., “Architettura dei computer: un approccio strutturato – quarta edizione”, UTET Libreria, 2000 (ISBN: 8877505931).
On the website of the course are available all the transparencies and the material used in class and exam papers from year 2008: